View ICS840001_286767.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
FEATURES
* 1 LVCMOS/LVTTL output, 7 typical output impedence * Crystal oscillator interface designed for 26.5625MHz, 18pF parallel resonant crystal * Selectable 106.25MHz or 212.5MHz output frequency * VCO range: 560MHz to 680MHz * RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal (637KHz - 10MHz): 0.696ps (typical) * RMS phase noise at 106.25MHz (typical) Phase noise: Offset Noise Power 100Hz ............... -94.4 dBc/Hz 1KHz .............. -119.9 dBc/Hz 10KHz .............. -130.2 dBc/Hz 100KHz .............. -131.5 dBc/Hz * 3.3V operating supply * -30C to 85C ambient operating temperature
GENERAL DESCRIPTION
The ICS840001 is a Fibre Channel Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS840001 uses a 26.5625MHz crystal to synthesize either 106.25MHz or 212.5MHz, using the FREQ_SEL pin. The ICS840001 has excellent phase jitter performance, over the 637KHz - 10MHz integration range. The ICS840001 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.
ICS
FUNCTION TABLE
Input FREQ_SEL 0 1 Crystal: 26.5625MHz Output Frequencies 106.25MHz (Default) 212.5MHz
BLOCK DIAGRAM
OE FREQ_SEL (Pullup) (Pulldown)
PIN ASSIGNMENT
VDDA OE XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VDD Q0 GND FREQ_SEL
XTAL_IN
OSC
XTAL_OUT
Phase Detector
VCO
637.5MHz w/ 26.5625MHz Ref.
/3
1
Q0
ICS840001
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
/6
0
M = /24 (fixed)
840001BG
www.icst.com/products/hiperclocks.html
1
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Type Power Input Input Input Power Description
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3, 4 5 6 7 8 Name VDDA OE XTAL_OUT, XTAL_IN FREQ_SEL GND Q0 VDD Analog supply pin. Output enable pin. When HIGH, Q0 output is enabled. Pullup When LOW, forces Q0 to HiZ state. LVCMOS/LVTTL interface levels. Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. Power supply ground. Single-ended clock output. LVCMOS/LVTTL interface levels. 7 typical output impedance. Core supply pin.
Output Power
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN CPD RPULLUP RPULLDOWN ROUT Parameter Input Capacitance Power Dissipation Capacitance Input Pullup Resistor Input Pulldown Resistor Output Impedance 5 VDD, VDDA = 3.465V Test Conditions Minimum Typical 4 24 51 51 7 12 Maximum Units pF pF K K
TABLE 3. CONTROL FUNCTION TABLE
Control Inputs OE 0 1 Output Q0 Hi-Z Active
840001BG
www.icst.com/products/hiperclocks.html
2
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
4.6V -0.5V to VDD + 0.5 V -0.5V to VDD + 0.5V 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -30C TO 85C
Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 Maximum 3.465 3.465 80 10 Units V V mA mA
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -30C TO 85C
Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current FREQ_SEL OE FREQ_SEL OE VDD = VIN = 3.465V VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V VDD = 3.465V, VIN = 0V -5 -150 2.6 0.5 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 0.8 150 5 Units V V A A A A V V
Output High Voltage; NOTE 1
VOL Output Low Voltage; NOTE 1 NOTE 1: Outputs terminated with 50 to VDD/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit".
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Test Conditions Minimum Typical Fundamental 26.5625 50 7 MHz pF Maximum Units
840001BG
www.icst.com/products/hiperclocks.html
3
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Test Conditions FREQ_SEL = 1 FREQ_SEL = 0 fOUT = 106.25MHz, (637KHz to 10MHz) fOUT = 212.5MHz, (2.55MHz to 20MHz) 20% to 80% Minimum 186.66 93.33 Typical 212.5 106.25 0.696 0.458 250 48 45 600 52 55 Maximum 226.66 113.33 Units MHz MHz ps ps ps % %
TABLE 6. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -30C TO 85C
Symbol fOUT Parameter Output Frequency
tjit(O)
tR / tF odc
RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time Output Duty Cycle
fOUT = 106.25MHz fOUT = 212.5MHz All parameters are characterized @ 212.5MHz and 106.25MHz. NOTE 1: Please refer to the Phase Noise Plots.
840001BG
www.icst.com/products/hiperclocks.html
4
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
TYPICAL PHASE NOISE AT 106.25MHZ
-10 -20 -30 -40 -50
Fibre Channel Filter 106.25MHz
RMS Phase Jitter (Random) 637K to 10MHz = 0.696ps (typical)
0
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 100k
Raw Phase Noise Data
TYPICAL PHASE NOISE AT 212.5MHZ
-10 -20 -30 -40 -50
Phase Noise Result by adding Fibre Channel Filter to raw data
1M 10M 100M
OFFSET FREQUENCY (HZ)
Fibre Channel Filter 212.5MHz
RMS Phase Jitter (Random) 2.55MHz to 20MHz = 0.458ps (typical)
NOISE POWER dBc Hz
-60 -70 -80 -90 -100
Raw Phase Noise Data
-110 -120 -130 -140 -150 -160 -180 -190 100 1k -170
Phase Noise Result by adding Fibre Channel Filter to raw data
100k 1M 10M 100M
10k
OFFSET FREQUENCY (HZ)
840001BG
www.icst.com/products/hiperclocks.html
5
0
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
1.65V 5%
Phase Noise Plot
V DD
SCOPE
Qx
Phase Noise Mask
LVCMOS
GND
f1
Offset Frequency
f2
-1.65V 5%
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
V
DD
Q0
Pulse Width t
2
80% 20% tR
80% 20% tF
PERIOD
Clock Outputs
odc =
t PW t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
840001BG
www.icst.com/products/hiperclocks.html
6
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840001 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD, and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin.
3.3V VDD .01F 10
V DDA .01F 10F
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840001 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 26.5625MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 27p
Figure 2. CRYSTAL INPUt INTERFACE
840001BG
www.icst.com/products/hiperclocks.html
7
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
different board layout, the C1 and C2 may be slightly adjusted for optimizing frequency accuracy. The output frequency can be set at either 106.25MHz or 212.5MHz. Leaving the R1 un-installed (or install 1 K pull-down) will set the output frequency at 106.25MHz. Installing the R1 pull up will set the output frequency at 212.5MHz.
LAYOUT GUIDELINE
Figure 3A shows a schematic example of the ICS840001. An example of LVCMOS termination is shown in this schematic. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this example, an 18 pF parallel resonant 26.5625MHz crystal is used. The C1=27pF and C2=33pF are recommended for frequency accuracy. For
VDD R2 10
VDDA C3 10uF C4 0.1u U1 1 2 3 4 8 7 6 5 VDD Q
VDD
R1 1K R3 43 Zo = 50 Ohm
OE
VDDA OE XTAL_OUT XTAL_IN
VDD Q0 GND FREQ_SEL
FRE_SEL
C2 33pF
X1 ICS840001 C1 27pF C5 0.1u LVCMOS
VDD=3.3V
FIGURE 3A. ICS840001 SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of P.C. board layout. The crystal X1 footprint in this example allows either surface mount (HC49S) or through hole (HC49) package. C3 is 0805. C1 and C2 are
0402. Other resistors and capacitors are 0603. This layout assumes that the board has clean analog power and ground planes.
FIGURE 3B. ICS840001 PC BOARD LAYOUT EXAMPLE
840001BG
www.icst.com/products/hiperclocks.html
8
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR RELIABILITY INFORMATION
TABLE 7.
JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
JA by Velocity (Meters Per Second)
0 1
90.5C/W
2.5
89.8C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7C/W
TRANSISTOR COUNT
The transistor count for ICS840001 is: 1521
840001BG
www.icst.com/products/hiperclocks.html
9
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
8 LEAD TSSOP
PACKAGE OUTLINE - G SUFFIX
FOR
TABLE 8. PACKAGE DIMENSIONS
SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication 95, MO-153
840001BG
www.icst.com/products/hiperclocks.html
10
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Marking 001B 001B Package 8 lead TSSOP 8 lead TSSOP on Tape and Reel Count 100 per tube 2500 Temperature -30C to 85C -30C to 85C
TABLE 9. ORDERING INFORMATION
Part/Order Number ICS840001BG ICS840001BGT
The aforementioned trademarks, HiPerClockSTM and FemtoClocksTM are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840001BG
www.icst.com/products/hiperclocks.html
11
REV. A MAY 10, 2004
Integrated Circuit Systems, Inc.
ICS840001
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
REVISION HISTORY SHEET
Rev A
Table T9
Page 11
Description of Change Ordering Information Table - corrected count from 154 per tube to 100.
Date 10/15/04
840001BG
www.icst.com/products/hiperclocks.html
12
REV. A MAY 10, 2004

▲Up To Search▲

Price & Availability of ICS840001

	To Download ICS840001 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .